pike.git/ src/ code/ amd64.c

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2020-02-09

2020-02-09 15:20:28 by Henrik Grubbström (Grubba) <grubba@grubba.org>

Disassembler [amd64]: Added a few more opcodes.

4771:    { "or", ALI8, }, { "or", AI, }, { NULL, 0, }, { "F", OP_F, },       /* 0x10 */ +  { "adc", RMR8, }, { "adc", RMR, }, { "adc", RRM8, }, { "adc", RRM, }, +  { "adc", ALI8, }, { "adc", AI, }, { NULL, 0, }, { NULL, 0, },    { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, },    { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, -  { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, -  { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, +        /* 0x20 */    { "and", RMR8, }, { "and", RMR, }, { "and", RRM8, }, { "and", RRM, },
4821:    /* 0x90 */    { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, },    { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, +  { "cbw/cwde/cdqe", OP_IMPLICIT_A, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, },    { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, -  { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, +        /* 0xa0 */    { "mov", ALM8, }, { "mov", AM, }, { "mov", MAL8, }, { "mov", MA, }, -  { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, +  { NULL, 0, }, { NULL, 0, }, { "cmpsb", 0, }, { "cmps", 0, },    { "test", ALI8, }, { "test", AI, }, { NULL, 0, }, { NULL, 0, },    { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, },   
4864:   {    /* 0x00 */    { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, +  { NULL, 0, }, { NULL, 0, }, { "clts", 0, }, { NULL, 0, },    { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, },    { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, -  { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, +        /* 0x10 */    { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, },
4878:    { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, },    { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, },    { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, -  { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, +  { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { "comiss/d", RRM, },       /* 0x30 */    { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, },
4894:       /* 0x50 */    { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, +  { "andps/d", RRM, }, { "andnps/d", RRM, }, { NULL, 0, }, { NULL, 0, }, +  { "add[p]s/d", RRM, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, },    { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, -  { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, -  { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, +        /* 0x60 */    { NULL, 0, }, { NULL, 0, }, { NULL, 0, }, { NULL, 0, },
5314:    bytes++;    break;    case 0x80: +  if (legacy_prefix[2] == 0x66) { +  sprintf(buf, "%d", ((INT16 *)(pc + bytes))[0]); +  bytes += 2; +  } else {    bytes += amd64_readint32(pc + bytes, buf); -  +  }    sprintf(buf + strlen(buf), "(%s)", reg_buf);    break;    }
5400:    }    if (op->flags & (OP_8|OP_S8)) {    sprintf(buffers[0] + strlen(buffers[0]), "$%d", ((signed char *)pc)[pos++]); +  } else if (legacy_prefix[2] == 0x66) { +  /* 16-bit */ +  sprintf(buffers[1] + strlen(buffers[1]), "$%d", ((signed INT16 *)(pc + pos))[0]); +  pos += 2;    } else {    sprintf(buffers[0] + strlen(buffers[0]), "$");    pos += amd64_readint32(pc + pos, buffers[0] + strlen(buffers[0]));