Interpreter: fixed handling of SAVE_LOCALS bitmask
Since the introduction of save_locals_bitmask, expendible_offset was
never set. Also since the handling of expendible_offset and
save_locals_bitmask were handled by the same case, the code was broken.
During pop entries handling of the save_locals bitmask could lead
to situations where locals above expendible_offset were 'copied' into
the trampoline frame. Those locals could have already been popped from
the stack by the RETURN_LOCAL opcode.
Also slightly refactored the code to not allocate more space for locals
than needed and removed some unnecessary casts.
This became visible and could lead to crashes when building for 32bit
on 64bit x86 machines.
FALL THROUGH -> FALLTHRU to survive -Wimplicit-fallthrough=4.
Interpreter: merge low_return variants
ARM32: add missing label
This fixes 5 testsuite failures.
ARM32: added DUP, SWAP and NOT
ARM: remove opcode statistics
There is a similar feature already available when compiling
Compiler: do not modify instrs array
ARM32: complete fast check threads
Slow path now only generated once per program.
ARM32: de-inlined F_RETURN
ARM32: some debugging checks
ARM32: de-inline free_svalue
To reduce code size, we generate a simple free_svalue version
at the beginning of every program. When freeing an svalue, we
jump to that de-inlined version for every type which is reference
counted. This reduces the size of the generated machine code by around
ARM32: use Pike_fatal for assert
ARM32: removed unused code
ARM32: check if MOVW/MOVH are supported
ARM32: preliminary check_threads_etc
Uses dedicated register for the fast_check_threads_etc counter but
is generated in too many places for now.
ARM: merge pike register handling
Most of the register loading and storing is now shared between 32 and 64 bit.
ARM: first step at merging arm 32 and 64 bit code base
moved label handling and register allocation into one source file.
ARM32 ARM64: Update PC before calling builtins
ARM32: implement F_PRIVATE_GLOBAL(_AND_POP)
ARM32: optimize handling of globals
* keep Pike_fp->current_storage in a register
* keep track of whether or not the current object
could have been destructed
* actually start using F_PRIVATE_GLOBAL
ARM32: added missing argument to inc/dec opcodes
ARM32: implement F_PRIVATE_GLOBAL
ARM32: added INC/DEC opcodes
ARM32: added the F_CALL_BUILTIN opcodes
It would be useful to know at assembler time, if a given efun has
a return value or not.
ARM32: renamed load and store instruction API
This new API with explicit bit widths will make sharing code
between the two arm arches easier.
ARM32: F_NE should always return 0 or 1
ARM32: fixed F_LOOP
We cannot rely on the loopcnt always being positive.
ARM32: implemented F_LOOP
ARM32: added F_OR_INT, F_AND_INT and F_XOR_INT
ARM32: implement F_RETURN_IF_TRUE
ARM32: fixed F_EQ/F_NE
The fast path (for everything but objects and functions) was broken
in these two opcodes.
ARM32: reordered arguments of lsl_reg_reg
It seems like lsl_reg_reg(dst, a, b) was actually dst = b << a.
This was not intended! These instructions were only used in
the F_EQ/F_NE opcodes where this "error" resulted in the slow
path being executed unconditionally. Also: the fast path is broken.
ARM32: fix several assert failure
Under some circumstances bad load/store instructions could be generated
for large offsets.
ARM32: better versions of F_STRING and F_CONSTANT
ARM32: more debug prologues
ARM32: fix bug in slowpath of integer ops
The slowpath of the integer operations could sometimes change the register
state. This was incorrect because it is not always executed.
ARM32: simplify some conditionals
ARM32: implement some F_RETURN_* opcodes
ARM32: correctly keep track of special registers
Since updating Pike_fp->pc would load the fp_reg, the fp_reg could
sometimes not be correctly invalidated after calling a opcode fun.
ARM32: simplify prologue/epilogue generation
We initially thought that we can generate function specific prologues and
epilogues, but this is not the case. Pike code might return through a different
epilogue than the one it entered by. This is unlikely to change.
ARM32: fixed svalue type in F_THIS_OBJECT
ARM32: introduced aliases for argument registers
ARM32: fix F_PROTECT_STACK
expendibles are stored as an offset in pike_frame now.
ARM32: implement F_THIS_OBJECT and F_SIZEOF_LOCAL
ARM32: better disassembler
- improved the output, especially the comments about immediate values
- stop leaking all those strings
- fixed one possibly NULL dereference
ARM32: do some checks only during init
ARM32: fix some warnings
ARM32: some cleanup in disassembler
ARM32: r12 is another temporary register
ARM32: use NOPs to fill fixed size mov
In some cases we do not know which addr we need to jump to when we have
to generate the instructions. Depending on the value, we might need up
to 2 (or 4 on pre-ARMv7) instructions. So we prefill some space with
NOPs and generate the right instruction sequence later.
ARM32: added more CMP opcodes and cleanup
ARM32: work on pre ARMv7
movw and movt are not available in ARMv6. Use less optimal code, instead.
Also added mvn and use that if possible.
ARM32: implement F_ASSIGN_LOCAL_AND_POP
ARM32: new API with imlicit add_to_program().
ARM32: keep Pike_fp->locals in r7
ARM32: labels with backward jumps
ARM32: add cmp_reg_imm
ARM32: not broken anymore
ARM32: add_rel_cond_jmp -> arm32_rel_cond_jmp
ARM32: really_free_svalue does not change fp or sp
ARM32: don't create opcode stats unconditionally
ARM32: implement fast paths for comparisons
ARM32: added disassembler
- prints all instructions in gdb-style
- resolves and adds jump labels
- interprets pike-related locations and registers
ARM32: use arm32_ prefix consistently
ARM32: simplify function exits
ARM32: use unsigned compare for pointers
ARM32: implement F_MARK_AT
ARM32: use movw and movt
ARM32: separate all F_MARK_* opcodes
ARM32: fix the order in _reg_reg opcodes
ARM32: added labels and F_SUBTRACT_INT and F_ADD_INT
ARM32: implement F_MARK
ARM32: comment about entry/exit
ARM32: added low level support for shift instructions
ARM32: save r7
ARM32: some comments
ARM32: implement OPCODE_INLINE_BRANCH
ARM32: enforce register order in arm32_push_int()
ARM32: implement F_STRING
Skeleton implementation of AARCH32 (ARM) machine code support
To be extended, also into AARCH64 machine code generation
Author: Arne Goedeke <firstname.lastname@example.org>
Author: Tobias S. Josefowitz <email@example.com>
AARCH32: fixed prologues
The prologue which enters into machine code does not necessarily correspond
to the epilogue which will exit from the interpreter. We therefore always
push and pop the same registers. Also, load pike sp/fp only if needed.
ARM32: implement F_INIT_FRAME
ARM32: remove c++ style comments
ARM32: implement F_ASSIGN_LOCAL
ARM32: check if offsets are small enough
ARM32: some helpers for sp loading/storing
ARM32: fix F_MARK_AND_CONST1 machine code
ARM32: simplify arm32_call_c_opcode()
ARM32: implement F_POP_SVALUE
ARM32: implement QUICK and comparison jumps
ARM32: use arm32_change_sp
ARM32: implement F_LOCAL
Further work on AARCH32:
* improved immediate stores
* use store multiple fpr int2sval store
* use register allocator
Author: Arne Goedeke <firstname.lastname@example.org>
Author: Tobias S. Josefowitz <email@example.com>
ARM32: renamed some variables
ARM32: add F_MAKE_ITERATOR and F_ADD
ARM32: generate better statistics
ARM32: add arm_call_c_opcode()
ARM32: added comparison opcodes
ARM32: arm32_call_efun() helper
We do not need to reload the stack_pointer, it can be inferred from the number
ARM32: recod opcode stats
ARM32: add F_ADD_INTS
ARM32: simplify arm32_ins_maybe_exit
ARM32: use register allocator in arm_push_int()
ARM32: always keep Pike_interpreter_pointer->stack_pointer up to date
ARM32: add debug_instr_prologues
ARM32: implement F_PROTECT_STACK and F_2_LOCALS
ARM32: implement F_FILL_STACK
ARM32: lower case code generators
ARM32: added native integer helper
- arm32_<op>_reg_int will take a 32bit integer as argument and generate one
or more opcodes, possibly by using temporary registers
ARM32: removed old test code
ARM32: implement F_POP_TO_MARK
ARM32: renamed ldr/str to load/store
keep FP->locals in R7
arm32_push_int(): enforce register order
tracing support for generated arm32 machine code
add_rel_cond_jmp -> arm32_rel_cond_jmp
arm32_call_c_opcode(): simplify flag processing
fix F_MARK_AND_CONST1 machine code
new API with imlicit add_to_program().
use arm32 consistently
lower case code generators
new integer arithmetic opcodes need this
arm_push_int(): use register allocator
added label support and F_SUBTRACT_INT and F_ADD_INT