pike.git / src / code / amd64.c

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pike.git/src/code/amd64.c:14:   #endif         /* Register encodings */   enum amd64_reg {REG_RAX = 0, REG_RBX = 3, REG_RCX = 1, REG_RDX = 2,    REG_RSP = 4, REG_RBP = 5, REG_RSI = 6, REG_RDI = 7,    REG_R8 = 8, REG_R9 = 9, REG_R10 = 10, REG_R11 = 11,    REG_R12 = 12, REG_R13 = 13, REG_R14 = 14, REG_R15 = 15,    REG_NONE = 4};    - /* We reserve register r13 and above (as well as RSP and RBP). */ + /* We reserve register r12 and above (as well as RSP, RBP and RBX). */   #define REG_BITMASK ((1 << REG_MAX) - 1) - #define REG_RESERVED (REG_RSP|REG_RBP) + #define REG_RESERVED (REG_RSP|REG_RBP|REG_RBX)   #define REG_MAX REG_R12   #define PIKE_MARK_SP_REG REG_R12   #define PIKE_SP_REG REG_R13   #define PIKE_FP_REG REG_R14   #define Pike_interpreter_reg REG_R15      #ifdef __NT__   /* From http://software.intel.com/en-us/articles/introduction-to-x64-assembly/    *    * Note: Space for the arguments needs to be allocated on the stack as well.
pike.git/src/code/amd64.c:275:    } while(0)      #define AMD64_CALL_REL32(REG, REL32) do { \    AMD64_ADD_REG_IMM32(REG, REL32, REG_RAX); \    add_to_program(0xff); \    add_to_program(0xd0); \    } while(0)      /* CALL *addr */   #define CALL_ABSOLUTE(X) do { \ -  void *addr__ = (X); \ -  AMD64_LOAD_IMM32(REG_RAX, addr__); \ +  size_t addr__ = (size_t)(void *)(X); \ +  if (addr__ & ~0x7fffffffLL) { \ +  /* Apple in their wisdom has the text \ +  * segment in the second 4GB block... \ +  * \ +  * Fortunately function entry points \ +  * are at least 32-bit aligned. \ +  */ \ +  if (!(addr__ & ~0x3fffffff8LL)) { \ +  AMD64_LOAD_IMM32(REG_RAX, addr__>>3); \ +  AMD64_SHL_IMM8(REG_RAX, 3); \ +  } else { \ +  /* Catch all. */ \ +  AMD64_LOAD_IMM(REG_RAX, addr__); \ +  } \ +  } else { \ +  /* Low 31-bit block. \ +  * Linux, Solaris, etc... */ \ +  AMD64_LOAD_IMM32(REG_RAX, addr__); \ +  } \    add_to_program(0xff); \    add_to_program(0xd0); \    } while(0)      #define AMD64_CLEAR_REG(REG) do { \    enum amd64_reg creg__ = (REG); \    if (creg__ & 0x08) { \    add_to_program(0x4d); \    creg__ &= 0x07; \    } else { \
pike.git/src/code/amd64.c:767: Inside #if defined(PIKE_DEBUG)
   if(b>255)    Pike_error("Instruction too big %d\n",b);   #endif    maybe_update_pc();       flags = instrs[b].flags;       addr=instrs[b].address;    switch(b + F_OFFSET) {    case F_CATCH: -  /* Special arguments for the F_CATCH instruction. */ -  AMD64_LOAD_RIP32(0x20, ARG1_REG); /* Address for the POINTER.. */ +  /* Special argument for the F_CATCH instruction. */ +  AMD64_LOAD_RIP32(0x20 - 0x03, ARG1_REG); /* Address for the POINTER. */    addr = inter_return_opcode_F_CATCH;    break;    case F_UNDEFINED:    ins_debug_instr_prologue(b, 0, 0);    amd64_push_int(0, 1);    return;    case F_CONST0:    ins_debug_instr_prologue(b, 0, 0);    amd64_push_int(0, 0);    return;
pike.git/src/code/amd64.c:829:    if (flags & I_UPDATE_FP) fp_reg = 0;       amd64_call_c_function(addr);    if (instrs[b].flags & I_RETURN) {    if ((b + F_OFFSET) == F_RETURN_IF_TRUE) {    /* Kludge. We must check if the ret addr is    * orig_addr + JUMP_EPILOGUE_SIZE. */    AMD64_LOAD_RIP32(JUMP_EPILOGUE_SIZE - 7, REG_RCX);    }    AMD64_CMP_REG_IMM32(REG_RAX, -1); -  AMD64_JNE(0x0f); -  AMD64_ADD_REG_IMM32(REG_RBP, -0x28, REG_RSP); +  AMD64_JNE(0x0f - 0x03); +  AMD64_POP(REG_RBX); // Stack padding.    AMD64_POP(REG_RBX);    AMD64_POP(REG_R12);    AMD64_POP(REG_R13);    AMD64_POP(REG_R14);    AMD64_POP(REG_R15);    AMD64_POP(REG_RBP);    AMD64_RET();    if ((b + F_OFFSET) == F_RETURN_IF_TRUE) {    /* Kludge. We must check if the ret addr is    * orig_addr + JUMP_EPILOGUE_SIZE. */