pike.git
/
src
/
code
/
sparc.c
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pike.git/src/code/sparc.c:228:
} while(0) /* * Register conventions: * * I0 Scratch * * I6 Frame pointer * I7 Return address *
-
* L0
&
Pike_interpreter
+
* L0 Pike_interpreter
_pointer
* L1 Pike_fp * L7 &d_flag * * O6 Stack Pointer * O7 Program Counter * */ #define SPARC_REG_PIKE_IP SPARC_REG_L0 #define SPARC_REG_PIKE_FP SPARC_REG_L1
pike.git/src/code/sparc.c:264:
#define PIKE_LDPTR SPARC_LDX #define PIKE_STPTR SPARC_STX #else /* !PIKE_BYTECODE_SPARC64 */ #define PIKE_LDPTR SPARC_LDUW #define PIKE_STPTR SPARC_STW #endif /* PIKE_BYTECODE_SPARC64 */ #define LOAD_PIKE_INTERPRETER() do { \ if (!(sparc_codegen_state & SPARC_CODEGEN_IP_IS_SET)) { \ SET_REG(SPARC_REG_PIKE_IP, \
-
((ptrdiff_t)(&Pike_interpreter))); \
+
((ptrdiff_t)(&Pike_interpreter
_pointer
)));
\
+
PIKE_LDPTR(SPARC_REG_PIKE_IP,
SPARC_REG_PIKE_IP,
0, 1);
\
sparc_codegen_state |= SPARC_CODEGEN_IP_IS_SET; \ } \ } while(0) #define LOAD_PIKE_FP() do { \ if (!(sparc_codegen_state & SPARC_CODEGEN_FP_IS_SET)) { \ LOAD_PIKE_INTERPRETER(); \ /* lduw [ %ip, %offset(Pike_interpreter, frame_pointer) ], %l1 */ \ PIKE_LDPTR(SPARC_REG_PIKE_FP, SPARC_REG_PIKE_IP, \
-
OFFSETOF(Pike_interpreter, frame_pointer), 1);
\
+
OFFSETOF(Pike_interpreter
_struct
, frame_pointer), 1); \
sparc_codegen_state |= SPARC_CODEGEN_FP_IS_SET; \ } \ } while(0) #define LOAD_PIKE_SP() do { \ if (!(sparc_codegen_state & SPARC_CODEGEN_SP_IS_SET)) { \ LOAD_PIKE_INTERPRETER(); \ /* lduw [ %ip, %offset(Pike_interpreter, stack_pointer) ], %l2 */ \ PIKE_LDPTR(SPARC_REG_PIKE_SP, SPARC_REG_PIKE_IP, \
-
OFFSETOF(Pike_interpreter, stack_pointer), 1);
\
+
OFFSETOF(Pike_interpreter
_struct
, stack_pointer), 1); \
sparc_codegen_state |= SPARC_CODEGEN_SP_IS_SET; \ sparc_pike_sp_bias = 0; \ } else if (sparc_pike_sp_bias > 0xf00) { \ /* Make sure there's always space for at least 256 bytes. */ \ SPARC_ADD(SPARC_REG_PIKE_SP, SPARC_REG_PIKE_SP, \ sparc_pike_sp_bias, 1); \ sparc_pike_sp_bias = 0; \ sparc_codegen_state |= SPARC_CODEGEN_SP_NEEDS_STORE; \ } \ } while(0) #define LOAD_PIKE_MARK_SP() do { \ if (!(sparc_codegen_state & SPARC_CODEGEN_MARK_SP_IS_SET)) { \ LOAD_PIKE_INTERPRETER(); \ /* lduw [ %ip, %offset(Pike_interpreter, mark_stack_pointer) ], %l2 */ \ PIKE_LDPTR(SPARC_REG_PIKE_MARK_SP, SPARC_REG_PIKE_IP, \
-
OFFSETOF(Pike_interpreter, mark_stack_pointer), 1); \
+
OFFSETOF(Pike_interpreter
_struct
, mark_stack_pointer), 1);
\
sparc_codegen_state |= SPARC_CODEGEN_MARK_SP_IS_SET; \ } \ } while(0) #define SPARC_FLUSH_UNSTORED() do { \ if (sparc_pike_sp_bias) { \ SPARC_ADD(SPARC_REG_PIKE_SP, SPARC_REG_PIKE_SP, \ sparc_pike_sp_bias, 1); \ sparc_pike_sp_bias = 0; \ sparc_codegen_state |= SPARC_CODEGEN_SP_NEEDS_STORE; \ } \ if (sparc_codegen_state & SPARC_CODEGEN_MARK_SP_NEEDS_STORE) { \ /* stw %pike_mark_sp, [ %ip, %offset(Pike_interpreter, mark_stack_pointer) ] */ \ PIKE_STPTR(SPARC_REG_PIKE_MARK_SP, SPARC_REG_PIKE_IP, \
-
OFFSETOF(Pike_interpreter, mark_stack_pointer), 1); \
+
OFFSETOF(Pike_interpreter
_struct
, mark_stack_pointer), 1);
\
sparc_codegen_state &= ~SPARC_CODEGEN_MARK_SP_NEEDS_STORE; \ } \ if (sparc_codegen_state & SPARC_CODEGEN_SP_NEEDS_STORE) { \ /* stw %pike_sp, [ %ip, %offset(Pike_interpreter, stack_pointer) ] */ \ PIKE_STPTR(SPARC_REG_PIKE_SP, SPARC_REG_PIKE_IP, \
-
OFFSETOF(Pike_interpreter, stack_pointer), 1);
\
+
OFFSETOF(Pike_interpreter
_struct
, stack_pointer), 1); \
sparc_codegen_state &= ~SPARC_CODEGEN_SP_NEEDS_STORE; \ } \ } while(0) #define SPARC_UNLOAD_CACHED() \ (sparc_codegen_state &= ~(SPARC_CODEGEN_FP_IS_SET| \ SPARC_CODEGEN_SP_IS_SET| \ SPARC_CODEGEN_MARK_SP_IS_SET)) void sparc_flush_codegen_state(void)
pike.git/src/code/sparc.c:567:
sparc_pike_sp_bias - sizeof(struct svalue), 1); sparc_codegen_state |= SPARC_CODEGEN_SP_NEEDS_STORE; } /* * */ #ifdef PIKE_DEBUG void sparc_debug_check_registers(int state,
-
struct Pike_interpreter *cached_ip,
+
struct Pike_interpreter
_struct
*cached_ip,
struct pike_frame *cached_fp, struct svalue *cached_sp, struct svalue **cached_mark_sp) { if (((state & SPARC_CODEGEN_IP_IS_SET) &&
-
(cached_ip !=
&
Pike_interpreter)) ||
+
(cached_ip != Pike_interpreter
_pointer
)) ||
((state & SPARC_CODEGEN_FP_IS_SET) && (cached_fp != Pike_interpreter.frame_pointer)) || ((state & SPARC_CODEGEN_SP_IS_SET) && (cached_sp != Pike_interpreter.stack_pointer)) || ((state & SPARC_CODEGEN_MARK_SP_IS_SET) && (cached_mark_sp != Pike_interpreter.mark_stack_pointer))) { Pike_fatal("Bad machine code cache key (0x%04x):\n" "Cached: ip:0x%08x, fp:0x%08x, sp:0x%08x, m_sp:0x%08x\n" " Real: ip:0x%08x, fp:0x%08x, sp:0x%08x, m_sp:0x%08x\n", state, (INT32)cached_ip, (INT32)cached_fp, (INT32)cached_sp, (INT32)cached_mark_sp,
-
(INT32)
&
Pike_interpreter, (INT32)Pike_interpreter.frame_pointer,
+
(INT32)Pike_interpreter
_pointer
,
+
(INT32)Pike_interpreter.frame_pointer,
(INT32)Pike_interpreter.stack_pointer, (INT32)Pike_interpreter.mark_stack_pointer); } } static void ins_sparc_debug() { int state = sparc_codegen_state; if (state & SPARC_CODEGEN_SP_NEEDS_STORE) { state &= ~SPARC_CODEGEN_SP_IS_SET;