pike.git
/
src
/
code
/
sparc.c
version
»
Context lines:
10
20
40
80
file
none
3
pike.git/src/code/sparc.c:1:
/* || This file is part of Pike. For copyright information see COPYRIGHT. || Pike is distributed under GPL, LGPL and MPL. See the file COPYING || for more information.
-
|| $Id: sparc.c,v 1.
22
2002/11/07 17:
19
:
51
grubba Exp $
+
|| $Id: sparc.c,v 1.
23
2002/11/07 17:
27
:
25
grubba Exp $
*/ /* * Machine code generator for sparc. * * Henrik Grubbström 20010720 */ #include "operators.h"
pike.git/src/code/sparc.c:369:
/* 0011 0110 1000 0000 0000 0000 0000 0000 */ 0x36800000|((-1)&0x3fffff), /* 1000 0000 1010 0000 0010 0000 0000 0000 */ 0x80a02000|(SPARC_REG_O1<<25)|(SPARC_REG_O1<<14)|8, /* 1000 0001 1100 0000 0010 0000 0000 0000 */ 0x81c02000|(SPARC_REG_O7<<14)|8, /* 1000 0000 0001 0000 0000 0000 0000 0000 */ 0x80100000|(SPARC_REG_O0<<25), };
+
static void sparc_disass_rd_reg(int reg_no)
+
{
+
switch(reg_no & 0x1f) {
+
case SPARC_RD_REG_CCR: fprintf(stderr, "%%ccr"); break;
+
case SPARC_RD_REG_PC: fprintf(stderr, "%%pc"); break;
+
default: fprintf(stderr, "%%sr(%d)", reg_no & 0x1f); break;
+
}
+
}
+
static void sparc_disass_reg(int reg_no) { fprintf(stderr, "%%%c%1x", "goli"[(reg_no>>3)&3], reg_no & 7); } void sparc_disassemble_code(void *addr, size_t bytes) { unsigned INT32 *code = addr; size_t len = (bytes+3)>>2;
pike.git/src/code/sparc.c:434:
if (op3 & 0x10) { fprintf(stderr, "%scc ", mnemonic); } else { fprintf(stderr, "%s ", mnemonic); } } else { switch(op3) { case SPARC_OP3_SLL: mnemonic = "sll"; break; case SPARC_OP3_SRL: mnemonic = "srl"; break; case SPARC_OP3_SRA: mnemonic = "sra"; break;
+
case SPARC_OP3_RD: mnemonic = "rd"; break;
case SPARC_OP3_SAVE: mnemonic = "save"; break; default: sprintf(buf, "op3(0x%02x)", op3); mnemonic = buf; break; } fprintf(stderr, "%s ", mnemonic); }
-
+
if (op3 == SPARC_OP3_RD) {
+
sparc_disass_rd_reg(opcode>>14);
+
fprintf(stderr, ", ");
+
} else {
sparc_disass_reg(opcode>>14); fprintf(stderr, ", "); if (opcode & 0x00002000) { fprintf(stderr, "0x%04x, ", opcode & 0x1fff); } else { sparc_disass_reg(opcode); fprintf(stderr, ", "); }
-
+
}
sparc_disass_reg(opcode >> 25); fprintf(stderr, "\n"); } break; case 0xc0000000: { /* Memory operations. */ int op3 = (opcode >> 19) & 0x3f; char buf[16]; char *mnemonic = NULL;